GPU_PTX IRIW+addr+po-p0:p1:p2:p3-xgyg
"Rf-w-g Addr-d-g-Rg Fr-w-g Rf-w-g Po-d-Rg-Rg Fr-w-g"

{}

 P0                 | P1                        | P2                 | P3                 ;
 mov.s32 r0, 1      | ld.cg.s32 r0, [r1]        | mov.s32 r0, 1      | ld.cg.s32 r0, [r1] ;
 st.cg.s32 [r1], r0 | and.b32 r2, r0 2147483648 | st.cg.s32 [r1], r0 | ld.cg.s32 r2, [r3] ;
                    | cvt.u64.u32 r3, r2        |                    |                    ;
                    | add.u64 r5, r5 r3         |                    |                    ;
                    | ld.cg.s32 r4, [r5]        |                    |                    ;

exists (1:r0=1 /\ 1:r4=0 /\ 3:r0=1 /\ 3:r2=0)
(device (kernel (cta (warp P0) (warp P1) (warp P2) (warp P3))))
x:global; y:global
Generated assembler
//START _litmus_P3
	ld.cg.s32 sr03, [sr13] ;
	ld.cg.s32 sr23, [sr33] ;
//START _litmus_P2
	mov.s32 sr02, 1 ;
	st.cg.s32 [sr12], sr02 ;
//START _litmus_P1
	ld.cg.s32 sr01, [sr11] ;
	and.b32 sr21, sr01, 2147483648 ;
	cvt.u64.u32 sr31, sr21 ;
	add.u64 sr51, sr51, sr31 ;
	ld.cg.s32 sr41, [sr51] ;
//START _litmus_P0
	mov.s32 sr00, 1 ;
	st.cg.s32 [sr10], sr00 ;

Binary '/tmp/dir6c9f9c.tmp/IRIW+addr+po-p0:p1:p2:p3-xgyg-0.exe' successfully loaded
Specification clusters: 4
Specification: [[(599, 3, 'R5'), (597, 3, 'R4')], [(642, 2, 'R10')], [(689, 3, 'R5'), (687, 3, 'R4')], [(738, 2, 'R10')]]
Cluster 0: OK
Cluster 1: OK
Cluster 2: OK
Cluster 3: OK
!!SUCCESS!!
Test IRIW+addr+po-p0:p1:p2:p3-xgyg Allowed
Histogram (16 states)
2375  :>1:r0=0; 1:r4=0; 3:r0=0; 3:r2=0;
166   :>1:r0=1; 1:r4=0; 3:r0=0; 3:r2=0;
12855 :>1:r0=0; 1:r4=1; 3:r0=0; 3:r2=0;
5186  :>1:r0=1; 1:r4=1; 3:r0=0; 3:r2=0;
124   :>1:r0=0; 1:r4=0; 3:r0=1; 3:r2=0;
1     *>1:r0=1; 1:r4=0; 3:r0=1; 3:r2=0;
7758  :>1:r0=0; 1:r4=1; 3:r0=1; 3:r2=0;
2380  :>1:r0=1; 1:r4=1; 3:r0=1; 3:r2=0;
1030  :>1:r0=0; 1:r4=0; 3:r0=0; 3:r2=1;
445   :>1:r0=1; 1:r4=0; 3:r0=0; 3:r2=1;
3440  :>1:r0=0; 1:r4=1; 3:r0=0; 3:r2=1;
5235  :>1:r0=1; 1:r4=1; 3:r0=0; 3:r2=1;
155   :>1:r0=0; 1:r4=0; 3:r0=1; 3:r2=1;
37    :>1:r0=1; 1:r4=0; 3:r0=1; 3:r2=1;
4147  :>1:r0=0; 1:r4=1; 3:r0=1; 3:r2=1;
4666  :>1:r0=1; 1:r4=1; 3:r0=1; 3:r2=1;
Ok

Witnesses
Positive: 1, Negative: 49999
Condition exists (1:r0=1 /\ 1:r4=0 /\ 3:r0=1 /\ 3:r2=0) is validated
Observation IRIW+addr+po-p0:p1:p2:p3-xgyg Sometimes 1 49999
Time IRIW+addr+po-p0:p1:p2:p3-xgyg 17.09

  -- device info --
Name:                           GeForce GTX TITAN
Major revision number:          3
Minor revision number:          5
Total global memory:            6442123264
Total shared memory per block:  49152
Number of multiprocessors:      14

Machine: formal
Revision 1383, version 5.01 GPU_PTX experimental backend
Command line: ./litmus -mach GTXTitan.cfg -a 8 -gpu-verf-comp true big_bucket/IRIW+addr+po-p0:p1:p2:p3-xgyg-0.litmus -s 50000
Parameters
#ifndef SIZE_OF_TEST
#define SIZE_OF_TEST 50000
#endif
#ifndef NUMBER_OF_RUN
#define NUMBER_OF_RUN 1
#endif
/* cc options: -arch=sm_35 */
/* barrier: user */
/* speedcheck: no */
/* gpu_general_bc: true */
/* gpu_mem_stress: true */
/* gpu-rand-threads: true */
/* gpu_cuda: true */
/* gpu_gen_addr: true */
/* gpu_cvt_global_to_gen: true */
/* gpu_cvt_shared_to_gen: true */
/* gpu_max_ctas: 14 */
/* gpu_min_ctas: 10 */
/* gpu_max_threads: 512 */
/* gpu_min_threads: 128 */